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Freescale Semiconductor /MKL28T7_CORE1 /XRDC /HWCFG2

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Interpret as HWCFG2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PIDP0 0 (0)PIDP1 0 (0)PIDP2 0 (0)PIDP3 0 (0)PIDP4 0 (0)PIDP5 0 (0)PIDP6 0 (0)PIDP7 0 (0)PIDP8 0 (0)PIDP9 0 (0)PIDP10 0 (0)PIDP11 0 (0)PIDP12 0 (0)PIDP13 0 (0)PIDP14 0 (0)PIDP15 0 (0)PIDP16 0 (0)PIDP17 0 (0)PIDP18 0 (0)PIDP19 0 (0)PIDP20 0 (0)PIDP21 0 (0)PIDP22 0 (0)PIDP23 0 (0)PIDP24 0 (0)PIDP25 0 (0)PIDP26 0 (0)PIDP27 0 (0)PIDP28 0 (0)PIDP29 0 (0)PIDP30 0 (0)PIDP31

PIDP24=0, PIDP19=0, PIDP29=0, PIDP23=0, PIDP9=0, PIDP20=0, PIDP31=0, PIDP26=0, PIDP25=0, PIDP10=0, PIDP2=0, PIDP3=0, PIDP7=0, PIDP30=0, PIDP16=0, PIDP15=0, PIDP12=0, PIDP1=0, PIDP8=0, PIDP17=0, PIDP28=0, PIDP0=0, PIDP21=0, PIDP11=0, PIDP18=0, PIDP13=0, PIDP14=0, PIDP27=0, PIDP22=0, PIDP6=0, PIDP5=0, PIDP4=0

Description

Hardware Configuration Register 2

Fields

PIDP0

Process identifier present from bus master 0

0 (0): Bus master 0 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 0 sources a process identifier register to the XRDC_MDAC logic.
PIDP1

Process identifier present from bus master 1

0 (0): Bus master 1 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 1 sources a process identifier register to the XRDC_MDAC logic.
PIDP2

Process identifier present from bus master 2

0 (0): Bus master 2 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 2 sources a process identifier register to the XRDC_MDAC logic.
PIDP3

Process identifier present from bus master 3

0 (0): Bus master 3 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 3 sources a process identifier register to the XRDC_MDAC logic.
PIDP4

Process identifier present from bus master 4

0 (0): Bus master 4 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 4 sources a process identifier register to the XRDC_MDAC logic.
PIDP5

Process identifier present from bus master 5

0 (0): Bus master 5 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 5 sources a process identifier register to the XRDC_MDAC logic.
PIDP6

Process identifier present from bus master 6

0 (0): Bus master 6 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 6 sources a process identifier register to the XRDC_MDAC logic.
PIDP7

Process identifier present from bus master 7

0 (0): Bus master 7 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 7 sources a process identifier register to the XRDC_MDAC logic.
PIDP8

Process identifier present from bus master 8

0 (0): Bus master 8 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 8 sources a process identifier register to the XRDC_MDAC logic.
PIDP9

Process identifier present from bus master 9

0 (0): Bus master 9 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 9 sources a process identifier register to the XRDC_MDAC logic.
PIDP10

Process identifier present from bus master 10

0 (0): Bus master 10 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 10 sources a process identifier register to the XRDC_MDAC logic.
PIDP11

Process identifier present from bus master 11

0 (0): Bus master 11 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 11 sources a process identifier register to the XRDC_MDAC logic.
PIDP12

Process identifier present from bus master 12

0 (0): Bus master 12 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 12 sources a process identifier register to the XRDC_MDAC logic.
PIDP13

Process identifier present from bus master 13

0 (0): Bus master 13 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 13 sources a process identifier register to the XRDC_MDAC logic.
PIDP14

Process identifier present from bus master 14

0 (0): Bus master 14 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 14 sources a process identifier register to the XRDC_MDAC logic.
PIDP15

Process identifier present from bus master 15

0 (0): Bus master 15 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 15 sources a process identifier register to the XRDC_MDAC logic.
PIDP16

Process identifier present from bus master 16

0 (0): Bus master 16 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 16 sources a process identifier register to the XRDC_MDAC logic.
PIDP17

Process identifier present from bus master 17

0 (0): Bus master 17 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 17 sources a process identifier register to the XRDC_MDAC logic.
PIDP18

Process identifier present from bus master 18

0 (0): Bus master 18 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 18 sources a process identifier register to the XRDC_MDAC logic.
PIDP19

Process identifier present from bus master 19

0 (0): Bus master 19 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 19 sources a process identifier register to the XRDC_MDAC logic.
PIDP20

Process identifier present from bus master 20

0 (0): Bus master 20 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 20 sources a process identifier register to the XRDC_MDAC logic.
PIDP21

Process identifier present from bus master 21

0 (0): Bus master 21 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 21 sources a process identifier register to the XRDC_MDAC logic.
PIDP22

Process identifier present from bus master 22

0 (0): Bus master 22 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 22 sources a process identifier register to the XRDC_MDAC logic.
PIDP23

Process identifier present from bus master 23

0 (0): Bus master 23 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 23 sources a process identifier register to the XRDC_MDAC logic.
PIDP24

Process identifier present from bus master 24

0 (0): Bus master 24 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 24 sources a process identifier register to the XRDC_MDAC logic.
PIDP25

Process identifier present from bus master 25

0 (0): Bus master 25 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 25 sources a process identifier register to the XRDC_MDAC logic.
PIDP26

Process identifier present from bus master 26

0 (0): Bus master 26 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 26 sources a process identifier register to the XRDC_MDAC logic.
PIDP27

Process identifier present from bus master 27

0 (0): Bus master 27 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 27 sources a process identifier register to the XRDC_MDAC logic.
PIDP28

Process identifier present from bus master 28

0 (0): Bus master 28 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 28 sources a process identifier register to the XRDC_MDAC logic.
PIDP29

Process identifier present from bus master 29

0 (0): Bus master 29 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 29 sources a process identifier register to the XRDC_MDAC logic.
PIDP30

Process identifier present from bus master 30

0 (0): Bus master 30 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 30 sources a process identifier register to the XRDC_MDAC logic.
PIDP31

Process identifier present from bus master 31

0 (0): Bus master 31 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 31 sources a process identifier register to the XRDC_MDAC logic.

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data